Context
The automated resolution of cognitive tasks primarily relies on learning algorithms applied to neural networks
which, when executed on standard CMOS based digital architectures, lead to a power consumption several orders
of magnitude larger than what the brain would require. Moreover, Conventional Edge neural network solutions can
only provide output predictions, lacking the ability to accurately convey prediction uncertainty due to their
deterministic parameters and neuron activations, resulting in overconfident predictions. Being able to model and
compute the uncertainty of a given prediction allows the user to make better decisions (e.g. in classification or
decision making processes) that can be therefore explained, which is crucial in a variety of applications, such as the
safety-critical tasks (e.g., autonomous vehicles, medical diagnosis and treatment, industrial robotics, and financial
systems). Probabilistic neural network is a possible solution to deal with uncertainty prediction. In addition, the
power consumption can be drastically reduced by using hardware computing systems with architectures inspired
by biological or physical models. They are mainly based on nanodevices mimicking the properties of neurons such
as the emission of stochastic or synchronous spikes. Numerous theoretical proposals have shown that nanoscale
spintronic devices (MTJ) are particularly well adapted. They can be used as stochastic components or as
deterministic components.
Our current researches have proved the probabilistic behavior of spintronic devices and their robustness face to
device and thermal phenomena variability, very well adapted for probabilistic neural network reasoning
implementation or as sigmoid neuron controlled by the physical properties of the spintronic devices.
The hired PHD candidate should be able to further optimize current approaches in compact architectures, provide
high level models for further integration in large scale designs, perform validation of all proofs of concepts of new
architectural implementations.
More in details, he/she will work on the following directions:
number generators to achieve better convergence, to reduce the power consumption typically generated by
the conventional hardware. A major challenge is how to inject inherent stochasticity of emerging technologies
into the probabilistic inference engine, and how to implement and validate the design. Meeting this challenge
will require multiscale device-to-system codesign approaches to leverage the underlying physics of the device.
under study in SPINTEC lab, may lead to even more area efficient crossbar implementations, thanks to their
new physical level features. The challenge is to design entire crossbar structures that can operate on spintronic
effects to prpose a large number of such components interacting on-chip via reconfigurable weights, and
demonstrate the advantage on standard cognitive tasks, both in terms of performance and energy
consumption.
The proposed research project could lead to the prototyping and functional validation of an integrated test vehicle
with CMOS and stochastic MTJs.
This research work will be carried out in the framework of Multidisiplinary AI Institute of Grenoble, and within an
international collaboration with Karlsruhe Institute or Technology (KIT) , with potential “Cotutelle” Double
Doctoral Degree.
Requested Skills
PhD candidate skills should cover
synthesis).
The level of English should allow the candidate to read and write scientific articles, as well as attending technical
discussions which are in English.
The candidate should have a certified Master Degree or equivalent, from university or engineer school.
An attraction for research and multidisciplinary topics is very important for this PHD.
Contact:
Lorena ANGHEL (Lorena.Anghel@phelma.grenoble-inp.fr)