Research team MRAM memories, within the Devices group
SPINTEC’s spinoff HProbe offers 3D magnetic probers (November 03rd, 2016)
HProbe is the latest spin-off company from SPINTEC, based on our expertise in MRAM research at the wafer scale. HProbe offers a 3D magnetic field wafer-level electrical tester for all types of MRAM (STT, SOT, OST, …), planar and perpendicular MTJ, magnetic sensors etc. The tester embed all standard procedures for testing and analyzing devices. […]
Read moreMisalign to write faster (October 17th, 2016)
The writing in conventional magnetic memories based on magnetic tunnel junctions (STT-MRAM) is intrinsically stochastic : a large amplitude thermal fluctuation is required to trigger the siwthing of the storage layer magnetization. SPINTEC has shown that this stochasticity can be almost completely suppressed by inducing an oblique anisotropy (easy-cone anisotropy) in the storage layer. This […]
Read moreEditor – Proceedings of the IEEE, Special issue on Spintronics (October 01st, 2016)
Special issue on Spintronics, published in the proceedings of the IEEE, vol.104 (10), October 2016 Editors: Hideo Ohno, Mark Stiles, Bernard Dieny
Read moreMaster students to visit SPINTEC and discuss our topics for internships (September 18th, 2016)
On 25th October 2016 our host Institut INAC welcomes students for a presentation of internship topics proposed to host Master-2 students during Spring 2017. Details will be provided later.
Read moreGREAT – A H2020 ICT project at SPINTEC (June 30th, 2016)
Overview GREAT (European H2020 project) was accepted at the Summer 2015. Its kick-off meeting took place at SPINTEC in Grenoble on February 22nd-23rd 2016. The project aims at developing magnetic stacks able to equally perform memory, radio-frequency as well as sensor functionalities on the same chip, to address Internet of Things (IoT) applications. The main objectives of […]
Read moreSPICE – An H2020 FET project at SPINTEC (May 19th, 2016)
A new research project has been accepted at the last FET H2020 call. The objective of SPICE is to realize a novel integration platform that combines photonic, magnetic and electronic components. Its validity will be shown by a conceptually new spintronic-photonic memory chip demonstrator with three orders of magnitude faster write speed and two orders […]
Read moreSoutenance de thèse – Antoine CHAVENT (January 15th, 2016)
Jeudi 21 Janvier 2016 à 14H00, Phelma MINATEC – Amphithéâtre M001 (3 Parvis Louis Néel – 38016 Grenoble) Monsieur Antoine CHAVENT du DSM/INAC/SPINTEC soutiendra une thèse intitulée « Réduction du champ d’écriture de mémoires magnétiques à écriture assistée thermiquement à l’aide du couple de transfert de spin » Les mémoires magnétiques à accès aléatoire (MRAM) développées par […]
Read moreImproving writing properties of TAS-MRAM by changing the voltage pulse shape (January 11th, 2016)
During writing of Thermally Assisted Switching Magnetic Random Access Memory (TAS-MRAM), the torque due to a voltage pulse may be used to help writing. As part of collaboration between Spintec and Crocus Technology, we brought out that most of the influence of the spin transfer torque is exerted during the last part of the voltage […]
Read moreUne mémoire STT MRAM sub-nanoseconde made in Spintec (December 09th, 2015)
Spintec développe une mémoire STT-MRAM dix fois plus rapide que les produits annoncés pour 2016 chez Samsung ou Intel. Sa vitesse d’écriture est inférieure à la nanoseconde, contre 5 à 10 nanosecondes habituellement. La différence tient au processus de déclenchement du pulse d’écriture. Spintec l’accélère grâce à deux polariseurs d’aimantation orthogonale, placés de part et […]
Read moreAméliorer le contrôle de l’écriture sub-nanoseconde de mémoires magnétiques en augmentant le rapport de forme des cellules mémoires (October 07th, 2015)
Les mémoires magnétiques à base de jonctions tunnel magnétiques appelées Spin-Transfer-Torque Random Access Memories (STT-MRAM) suscitent un intérêt considérable pour la micro-électronique grâce à leurs avantages combinés de non-volatilité, densité, vitesse, endurance. Dans ce travail, une nouvelle variété de telles mémoires a été développée offrant une vitesse d’écriture sub-ns appropriée pour les applications de type […]
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