On Friday November 29, 2024 at 10:00 we have the pleasure to welcome Johannes Müller from GlobalFoundries. He will give us a seminar entitled:
Embedded STT-MRAM – Building Trust and Moving Ahead
Place: IRIG/SPINTEC, CEA Building 10.05, auditorium 445
Video conference: https://univ-grenoble-alpes-fr.zoom.us/j/98769867024
Meeting ID: 987 6986 7024 Passcode: 025918
Abstract: In this talk we will review the challenges and required MTJ stack innovations on the road towards an automotive capable embedded STT-MRAM solution. Due to the multitude of individual microchips in a modern vehicle, whose malfunction could ultimately lead to a critical error, the chip failure rate per individual component needs to be strongly reduced. To keep enough reliability margin for the error correction code at the end of life, the initial bit error rate needs to be pushed to the deep sub-ppm regime. A strong line of defense for magnetic drifts and a clear understanding of magnetic immunity needs to be established. This requires the introduction of new metrology and methodologies. In addition to that, achieving readability across the more demanding temperature specifications requires significant advancements from the first generation of embedded STT-MRAM. To lead over into an active Q&A session the talk will be concluded by an outlook on spintronics beyond classical STT-MRAM applications.
Biography: Dr. Johannes Müller is currently leading the MRAM technology development in the Ultra-Low Power CMOS product line of GlobalFoundries. Previously, he was acting as the overall-integrator for the now qualified and volume-ramped 22FDX® embedded STT-MRAM technology. Prior to joining GlobalFoundries, Dr. Müller initiated and headed the group for Non-Volatile Memories at Fraunhofer society overseeing direct industry collaborations and EU projects focused on FRAM, FeFET, STT-MRAM, OXRAM, and eFLASH. With the discovery of ferroelectricity in HZO and the first demonstration of a FeFET scaled to the 2X nm node Dr. Müller largely contributed to the recent revival of ferroelectric memories and devices. To date Dr. Müller has (co-)authored >150 peer-reviewed journal and conference papers and holds several patents (H-index: 53). As panelist, invited speaker, committee member and short course tutor Dr. Müller has served the scientific community at e.g. IEDM, VLSI, IMW, NVMTS, SSDM, SISC, INTERMAG, etc., and, as an expert in his field, contributed to the ERD Working Group of the former ITRS.
